Senior SoC Architect – Unified Intel Chassis (UIC) IP and Platform Architecture
건축가정규직시니어 · 4~10년
인텔의 Unified Intel Chassis(UIC) IP 및 플랫폼 아키텍처를 정의하고 주도할 시니어 SoC 아키텍트를 모집합니다. SoC IP 아키텍처 설계 경험과 AMBA(AXI, CHI) 프로토콜에 대한 깊은 이해가 필수입니다. 고대역폭 인터커넥트 설계 및 전력 최적화 역량을 갖춘 전문가를 찾으며, 플랫폼 성능 모델링 및 아키텍처 사양 작성 업무를 수행하게 됩니다.
Role Overview We are looking for a strong architecture lead to define and drive architecture specifications for Unified Intel Chassis (UIC) IP components and subsystems. This role combines architecture definition with implementation awareness and performance ownership. The candidate will also work on platform-level performance, including building performance environments and driving closure in partnership with system architects and cross-functional teams. The architecture must be power-optimized, highly scalable, and practical for implementation across multiple product generations. Key Responsibilities - Author architecture specifications for Unified Intel Chassis IP components and subsystem integration. - Ensure architecture is implementation-aware, scalable, and power-optimized. - Drive platform performance analysis and closure, including bottleneck identification and optimization. - Build and enhance platform performance environments, models, and benchmarking flows. - Define and validate end-to-end QoS, arbitration, and routing strategies for high-bandwidth traffic. - Partner with system architects, RTL/design, verification, firmware/software, and performance teams to align architecture with product goals. - Define architecture trade-offs, assumptions, interfaces, and measurable success criteria. - Support debuggability, safety, reliability, and serviceability requirements in architecture definition. UIC IP Scope - UIC Coherent and Non-Coherent Fabric - Protocol Adaptors for industry-standard protocols (AXI, CHI, CXL, UAL, etc.) - Cache Controller IP - MMU / IOMMU IP - Clock, Reset, and Power Management IP - Debug and Analytics IP - Security and Access Management IP
Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Experienced Hire
Shift 1 (India)
India, Bangalore
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
N/A
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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