IP Design Verification Engineer

Job Details:

Job Description:

Position Overview

We are looking for a passionate FPGA/Emulation System Validation Engineer who is motivated to work on cutting-edge IPs and process nodes that power Intel products across Client, Server, and Bootable SoC Test chips, enabling Intel Foundry Customers.

The experienced engineer will have an opportunity to define a robust and high-quality test coverage plan to validate various IPs and protocols on x86/ARM/RISC-V, PCIe, CXL, DDR, and UCIe using FPGA-based early prototyping and emulation validation hardware systems.

Key Responsibilities

• Define and develop robust, high-quality test coverage plans to validate various IPs and protocols including x86/ARM/RISC-V, PCIe, CXL, DDR, and UCIe
• Scope, develop, and execute validation test plans for the latest generation IPs and SoCs
• Contribute to testbench bring-up and troubleshooting involving FPGA boards, test cards, and debug tools
• Deliver proper documentation for validation strategies, plans, best-known methods, and learnings
• Continuously strive for innovation in problem-solving to improve test coverage, minimize project execution time, and increase efficiency
• Keep validation lead and architect updated on milestone progress, challenges, risks, and impact to quality or schedule with integrity

What We're Looking For

To be successful in this role, you should demonstrate the following professional traits:

• Self-starter mentality — highly motivated to independently learn IP architecture, new verification tools, flows, and methodologies while adapting quickly to changing technologies and environments
• Effective communicator — able to clearly convey milestone progress, risks, and challenges to leads and architects while collaborating across cross-site teams
• Innovative problem-solver — passionate about pushing verification, validation, and regression testing to the next level of efficiency through creative and analytical thinking
• Highly motivated and curious team player — keen interest in finding and resolving simulation, emulation, and silicon failures
• Agile and versatile — able to adapt quickly to shifting priorities, technologies, and team needs

Qualifications:

Minimum Qualifications

You must possess one of the following education and experience combinations to be initially considered for this position:

• Bachelor's degree in Electronics Engineering, Computer Engineering, or equivalent field with 3+ years of relevant work experience
• Master's degree in Electronics Engineering, Computer Engineering, or equivalent field with 1+ years of relevant work experience

In addition, all candidates must have:

• Hardware experience with Verilog, VHDL, and SystemVerilog
• Software experience with C, C++, and Python
• Knowledge of Computer System Architecture
• Hands-on experience with hardware and software debugging tools
• Experience with technical specifications for architecture, microarchitecture, registers, and schematics

Preferred Qualifications

• Experience with debug of Intel chipsets and/or CPUs
• Experience with IA-Core Assembly and/or Python
• Knowledge and hands-on experience with logic analyzers, oscilloscopes, and protocol analyzers
• IP or full chip integration/simulation/emulation/verification experience
• Familiarity with hardware tools such as VCS, Verdi, DVE, and OVM/UVM

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Folsom

Additional Locations:

Business group:

The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.