Position Overview
MangoBoost is actively seeking for highly skilled and motivated IP Design Engineers to join our hardware development group. We are recruiting across multiple specialization tracks — Digital Hardware IP Design, Design Technology, and FPGA Prototyping — to support the development of advanced hardware designs targeting both ASIC and FPGA platforms.
Responsibilities & Opportunities
- Develop high-quality IPs for FPGA and ASIC implementation with strong focus on PPA (Power, Performance, Area)
- Establish and maintain efficient IP design and delivery flows
- Collaborate with cross-functional teams (Architecture, Verification, SoC design, Software) for integration and validation
- Build FPGA systems for IP verification as well as FPGA-based commercial products.
- Stay current with emerging design methodologies and industry trends
Required Qualifications
- Bachelor’s degree, Master’s degree, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- Minimum 3 years of industry experience in hardware design, in either ASIC or FPGA design environments; more experienced candidates are strongly encouraged to apply.
- Solid understanding of digital hardware design concepts and SoC or FPGA development flows.
- Hands-on experience with Verilog HDL and industry-standard EDA tools.
Key Roles
MangoBoost offers multiple specialization tracks within IP design. Depending on expertise and project needs, engineers may focus on a single role or contribute across multiple roles.
1. Digital Hardware IP Logic Design
Role Scope
- Architecture design, RTL design, and implementation of DPU IPs in Verilog/SystemVerilog or SystemC
- Optimize for performance, power, and area in production-grade designs
Preferred Qualifications
- Experience with network or high-speed interface IPs (Ethernet, PCIe, UCIe)
- Experience with storage-related IPs (e.g., SSD controller design)
- Experience with High-Level Synthesis (e.g., Catapult HLS or Stratus)
2. Design Technology (Design Flow & Automation)
Role Scope
- Develop and maintain IP development and QA flows for FPGA/ASIC projects
- Develop and maintain integration flows for incorporating IPs into larger SoC designs
- Build and enhance automation scripts (Python, Perl, etc.) for EDA workflows
- Serve as a contact point with EDA vendors, including tool version evaluation and methodology assessment
Preferred Qualifications
- Experience with top-level SoC integration and establishing end-to-end design flows spanning RTL, DV, and backend implementation
- Experience with scripting and automation for design workflows, including RTL code transformation/generation and memory model replacement
- Experience managing standard cell libraries, memory models, and hard macro IPs, and setting up quality assurance flows such as DRC (linting, CDC, synthesizability) and RTL-level power estimation
- Experience in evaluating EDA tool versions and reviewing emerging methodologies/technologies
3. FPGA Prototyping & Product Development
Role Scope
- Lead FPGA IP integration, synthesis, and validation
- Develop FPGA prototypes for ASIC verification and early deployment testing
- Drive commercial-grade FPGA projects, from development to deployment
Preferred Qualifications
- Proven track record of FPGA project delivery using vendor-specific toolchains (Vivado, Quartus, etc.)
- Experience with commercial FPGA-based product development
- Experience with ARM-based FPGA platforms, PCI Express, Ethernet interfaces, and memory subsystems (e.g., DDRx, LPDDRx, NAND, NOR)
About us
MangoBoost, Inc.
Agentic AI is fundamentally reshaping the paradigm of AI infrastructure. As environments emerge where countless AI agents operate simultaneously, conventional data center architectures are reaching their limits in both performance and efficiency. In response to this shift, MangoBoost is pioneering a new approach with its full-stack AI infrastructure solution designed to innovate every layer of the AI data center.
From LLMBoost, our AI inference optimization software, to GPU and storage systems powered by our proprietary DPU architecture, and orchestration software that seamlessly integrates and manages the entire stack, MangoBoost designs and develops every layer of AI infrastructure in-house. Rather than building isolated products, we focus on eliminating system-wide bottlenecks and fundamentally addressing inefficiencies across the entire infrastructure stack.
MangoBoost’s technology minimizes data movement and coordination overhead while maximizing overall system resource utilization, enabling exceptional performance and optimized total cost of ownership (TCO) for customers. Today, our solutions are already being deployed within real-world AI infrastructure environments through global partners, validating the strength of our technology. Through these efforts, MangoBoost is establishing a new global standard for AI data centers.
Notice Regarding Return of Hiring Documents
- This notice is in accordance with Article 11, Section 6 of the Fair Hiring Procedure Act, which allows job applicants, excluding the final successful candidate, to request the return of any recruitment documents they have submitted.
- Job applicants who were not selected as the final candidates in the recruitment process are entitled to request the return of the recruitment documents they submitted within 180 days of the date the employment decision is confirmed. However, this does not apply to documents submitted via the website or email, or documents voluntarily submitted by the applicant without the company’s request. If the recruitment documents are lost due to natural disasters or other reasons for which the company is not responsible, it will be considered as having been returned.
- Applicants wishing to request the return of their recruitment documents should fill out the Request for Return of Hiring Documents [Form 3 of the Enforcement Rules of the Fair Hiring Procedure Act] and submit it by email (recruiting@mangoboost.io). The documents will be sent by registered mail to the designated address within 14 days from the confirmation of submission. Please note that the cost of registered mail will be borne by the recipient.
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