딥엑스에서 SoC 플랫폼 SW 엔지니어를 채용합니다. C/Assembly를 활용한 SoC Bring-up 및 임베디드 펌웨어 개발 경험이 필수입니다. 하드웨어와 소프트웨어의 접점에서 FPGA/Emulation 기반의 검증과 최적화를 주도할 역량 있는 인재를 찾습니다. 세계적인 NPU 기술력을 보유한 유니콘 기업에서 차세대 AI 반도체 인프라를 함께 구축할 기회입니다.
DEEPX is a forward-thinking Series D startup architecting the infrastructure for the Physical AI era.
By delivering the world’s most energy-efficient NPU technology, we are solving the critical power and heat challenges of Generative AI to bring super-intelligence to every device, everywhere.
Our global leadership is validated by our record-breaking recognition as a multi-year CES Innovation Award honoree (2024 & 2026) and being named the 2024 Frost & Sullivan Company of the Year in the NPU sector. With an enterprise value approaching 1 trillion KRW, DEEPX offers a unique pre-IPO
opportunity to join a market leader defining the new industry standard for the $70B AI semiconductor market.
We are currently scaling toward mass production of our flagship DX-M1 (Samsung 5nm) with over 50 global projects scheduled, while engineering next-generation 2nm solutions to support 100B parameter Large Language Models (LLM) at the edge. ☞ Link
★ If you want to be part of world-class innovation? Please talk with us.
★Explore our journey: The DEEPX White Paper ☞ Link
Unlike traditional software roles, this position sits within the SoC Design Organization. You will work at the intersection of hardware and software, developing the essential software layers required to verify, bring up, and stabilize our AI SoC. Your mission is to ensure that the hardware architecture is functional and performant by developing low-level drivers, diagnostics, and verification environments.
□ Pre-Silicon Verification (SW/HW Co-design): Develop firmware and low-level test suites for SoC functional verification using FPGA prototypes and Emulation (Palladium, Zebu, etc.).
□ Post-Silicon Bring-up: Lead the initial power-on and functional "bring-up" of new ASIC silicon, ensuring the hardware blocks (CPU, NPU, Peripherals) communicate correctly.
□ Hardware-Level Diagnostic SW: Design and implement diagnostic software to stress-test hardware components and identify design flaws or manufacturing defects.
□ Bare-metal & RTOS Development: Develop core boot-code, hardware abstraction layers (HAL), and low-level drivers in non-OS or RTOS environments.
□ Architecture Collaboration: Work with RTL designers to define register maps, interrupt handling, and memory-mapped I/O (MMIO) structures.
□ Performance Profiling: Measure and optimize hardware-level bottlenecks (latency, throughput) before the hand-off to the general SW team.
□ Hardware-Oriented Mindset: Strong understanding of Computer Architecture (Pipeline, Cache, DMA, Bus protocols like AMBA/AXI).
□ Low-Level Programming: Expert proficiency in C and Assembly for resource-constrained environments (Bare-metal).
□ SoC Lifecycle Experience: Experience in at least one full cycle of SoC bring-up (from FPGA/Emulation to Silicon).
□ Debugging Skills: Proficient in using hardware debugging tools such as JTAG (Lauterbach/Trace32), Logic Analyzers, and Protocol Analyzers.
□ Educational Background: Bachelor’s or higher in Computer Engineering, Electrical Engineering, or a related field.
□ RTL Familiarity: Ability to read and understand Verilog or SystemVerilog code to debug hardware-software interface issues.
□ Scripting: Proficiency in Python or Perl for automating hardware test sequences and data analysis.
□ Interface Expertise: Deep knowledge of SoC subsystems: PCIe, LPDDR4/5, MIPI, or high-speed SerDes.
□ Emulation Platforms: Experience with hardware emulation (Veloce, ZeBu) or virtual platforms (SystemC/TLM).
□ Application Review - (Phone Interview) - Technical Interview - Organizational Culture Fit Interview - CEO Interview - Reference Check / Compensation Discussion
※ The recruitment process may vary depending on the position and application content.
※ Candidates with less than 3 years of experience are required to submit their academic transcripts.
□ Full-time (3-month probationary period with 100% compensation)
□ Monday to Friday, 9:00 AM – 6:00 PM (Lunch break: 12:00 PM – 1:00 PM)
□ If any false information is found in the application or onboarding documents, the job offer may be withdrawn even after confirmation.
□ A 3-month probationary period applies after joining, with no reduction in salary or benefits.
□ 모든 정규직 입사자에게 연봉 수준의 스톡옵션 부여
□ 최신 사양 장비 및 최고의 근무 환경 제공 (최신 노트북, 높낮이 조절식 스탠딩 데스크, 모니터암, 듀얼모니터 등 제공)
□ 점심식사 + 아침 & 저녁식사 지원
□ 스낵, 아이스크림, 음료 등 사내 카페 무제한 간식 제공
□ 사우나가 포함된 피트니스 비용 지원
□ 연 1회 종합건강검진 지원 (배우자 포함)
□ 생일, 결혼기념일, 크리스마스이브 축하금 지급 및 조기퇴근 제공
□ 설/추석 명절 상여금 지급
□ 축하와 위로를 위한 경조휴가 및 경조금 지원
