인텔 실리콘 섀시 팀에서 Formal Verification 엔지니어를 채용합니다. SystemVerilog 및 모델 체킹 역량을 바탕으로 인터커넥트 패브릭과 프로토콜 브리지의 검증을 주도합니다. 4~13년의 경력을 요구하며, 아키텍처 및 설계 팀과 협업하여 검증 인프라를 고도화하는 역할을 수행합니다.
The Role and Impact Intel is seeking a Formal Verification Engineer for the Silicon Chassis team. This role focuses on applying formal methods to exhaustively verify our interconnect fabric, protocol bridges, and link-layer logic. You will own end-to-end formal verification, from property specification through proof convergence - across multiple protocol domains. You will work closely with architecture, design, and software teams and are expected to contribute across traditional discipline boundaries. This role requires strong Formal depth, solid protocol knowledge, hands-on coding strength, and growing ability to mentor junior engineers. AI-assisted workflows are part of everyday development here. Consistent execution against schedule and quality goals is expected. Key Responsibilities - Develop and execute comprehensive formal verification test and coverage plans, including the definition of scope, strategy, and techniques. - Create abstraction models to enable convergence on designs and apply abstraction techniques to formal verification. - Generate and validate formal proofs to implement verification plans and resolve failing tests through corrective measures. - Collaborate across architecture, RTL design, and physical design teams to improve the verification of complex architectural and microarchitectural features. - Maintain and enhance existing formal verification infrastructure, tools, and methodologies. - Simplify and model problems using architecture modeling techniques to verify protocols and architectures. - Utilize tools to formally prove design protocols, resolve BDD complexity, and optimize data paths. - Document test plans, track verification progress, and drive technical reviews with cross-functional teams.
Minimum Qualifications
Preferred Qualifications
If you are excited about the opportunity to work on cutting-edge technology and contribute to shaping the future of computing, we encourage you to apply and join Intel's journey of innovation and excellence.
Experienced Hire
Shift 1 (India)
India, Bangalore
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
N/A
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.