디지털 컨트롤러 개발팀을 이끌며 마이크로 아키텍처 설계부터 실리콘 검증까지 전체 프로젝트 수명 주기를 관리해요. 전자공학 또는 컴퓨터공학 학사 학위가 필수이며, VLSI 설계 및 검증 분야에서 12년 이상의 경력과 3~5년 이상의 리더십 경험을 갖춰야 해요. Verilog, System Verilog, UVM 및 ASIC/FPGA 설계 흐름에 대한 숙련도가 필요해요. 글로벌 팀과 협업하며 고객 대응 및 프로젝트 일정 관리를 수행하는 역할을 맡게 돼요.
Are you ready for exciting development opportunities with massive growth potential? Do you thrive in a fast-paced environment, embrace large responsibilities, and dream of working on cutting-edge technologies with a super bright team?
As a leading provider of high-performance mixed-signal IPs integrated into many of today's most exciting applications, such as smart phones, automotives, IoT, wearables, and sensors, among many others. We seek the brightest minds to work hands-on with cutting-edge technologies alongside our world-class engineers.
Responsible for micro-architecture specification and RTL design of modules in Verilog
Responsible for project direction and planning, mentoring and technical guidance of the team.
Lead development teams in the development of digital controllers through the full project lifecycle, including analysis, design, development, verification, testing and implementation.
Leading verification team to develop advanced test plans.
Hardware verification of the digital module using cutting edge FPGA kits.
Provide technical leadership on one or more projects
Solve complex problems which may be multidisciplinary or require an in-depth analysis of variable factors
Defining project-specific best practices, and lead code reviews.
Identifying opportunities for improving productivity and reducing errors.
Own delivery schedules, resource planning, and risk mitigation across concurrent projects
Engage with customers and partners on IP deliverables, verification collateral, and integration support
Represent the team in program reviews, milestone sign-offs, and customer-facing discussions
Foster a culture of technical excellence, peer review, knowledge sharing, and continuous improvement
Drive team motivation through clear vision-setting, timely recognition of achievements, and visible support during critical project phases
Bachelor’s degree of: Electronics/Computer Engineering.
Years of experience in the same field: 12+ Years of experience in VLSI Digital Design/Verification, with 3-5+ years in a people management or technical lead role
Proven track record of taking IPs from spec to silicon-proven delivery
Strong knowledge of Verilog RTL design/simulation.
Proficiency in ASIC/FPGA design flows including RTL Synthesis, Place and Route, and Timing Sign-off.
Strong knowledge of clock domain crossing (CDC) and reset domain crossing (RDC) techniques
Experience with System Verilog, UVM, RTL/gate verification techniques
Solid understanding of functional and code coverage metrics and closure
Strong knowledge of Python/Perl/TCL/Shell scripting languages
Experience working with global teams
Desirable Qualifications and Experience:
Knowledge of high level synthesis techniques and C-simulation/validation
Masters Degree is a plus.
At Mixel, a Silvaco company, we believe in empowering our people and meeting them where they are in their careers. Our Total Rewards package is designed to reflect the local culture and community where our employees live and work — because we know success starts with feeling valued and supported. Our people are our greatest strength. We also believe in a pay-for-performance philosophy — rewarding impact, recognizing achievements, and providing security for the future. Here are some of the key highlights:
Competitive pay
Long-term incentive plan awards (RSUs)
Health benefits
Paid holidays and time off
Various learning and leadership opportunities
