Intel은 차세대 CPU 코어 및 SoC 설계를 담당할 CPU Circuit Design Engineer를 채용합니다. VLSI 또는 회로 설계 분야에서 2년 이상의 경력이 필수이며, EDA 툴 활용 능력이 요구됩니다. 하이파 또는 페타티크바에서 근무하며 하이브리드 근무 모델을 지원합니다. 트랜지스터 레벨의 회로 분석 및 최적화 업무를 수행하게 됩니다.
You will join Intel's development center in Haifa/PTK, part of Intel's global organization responsible for designing next-generation CPU cores and SoCs using advanced process technologies.
As a CPU Circuit Design Engineer, you will work closely with senior design and development engineers on advanced CPU IP designs. You will contribute directly to multiple stages of the circuit design flow, including detailed circuit analysis, design implementation, and optimization at the transistor level, while applying industry best practices and proven methodologies.
The team focuses on delivering high-speed, best quality IP designs for CPUs that meet aggressive power, performance, and area targets. You will take ownership of defined design blocks, participate in technical decision-making, and be exposed to real-world design challenges using state-of-the-art EDA tools in a fast-paced, collaborative environment.
Design, analyze, and debug CPU circuits at transistor level with increasing ownership
Contribute to circuit-level implementation, optimization, and debugging across design stages using both manual design techniques and automation tools
Perform power, performance, and area (PPA) analysis and drive design trade-offs for IP blocks
Participate actively in design reviews, quality checks, and post-silicon debug support
Collaborate with cross-functional teams including synthesis teams, Front End design (RTL), and layout
Apply and help refine Intel circuit design methodologies and automation flows for IP development
Experienced Hire
Shift 1 (Israel)
Israel, Haifa
Israel, Petah-Tikva
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
N/A
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.