Job Details:

Job Description:

The Role and Impact as an IP Logic Design Engineer, you will be at the forefront of innovative hardware development, contributing directly to Intel's success in delivering world-class products. In this role, you will design, optimize, and validate cutting-edge IP blocks for integration into System-on-Chip (SoC) designs. Your work will directly impact on achieving power, performance, area, and timing goals, ensuring Intel remains a leader in the global semiconductor industry. By collaborating with SoC customers, verification teams, and other stakeholders, you will help ensure smooth integration, high-quality IP delivery, and exceptional product performance. This is your opportunity to drive meaningful technological advancements while working in a dynamic and collaborative environment.

The primary responsibilities for this role will include, but are not limited to:

Develop logic design, RTL coding, and simulation for IP blocks, functional units, and subsystems.
Define and implement architecture and microarchitecture features for IP blocks.
Apply strategies, tools, and methods to optimize logic design for power, performance, area, and timing goals.
Create and debug register transfer level (RTL) designs to ensure correctness and quality for physical implementation.
Review verification plans, ensure features are properly tested, and resolve issues arising from failing RTL tests.
Collaborate with SoC customers to ensure seamless integration, verification, and high-quality delivery of IP blocks.
Drive compliance with quality assurance protocols for smooth IP handoff to SoC teams.
Document technical requirements, designs, and implementation details.

Qualifications:

Minimum Qualifications:

Minimum qualifications are required to be initially considered for this position.

Bachelor's or BS degree and/or prolonged course of study in a specialized field, or equivalent experience per business needs.
5+ years of relevant experience with a bachelor’s degree, 3+ years with a master’s degree, or 0 years with a PhD.
Proficiency in System Verilog and Verilog for RTL and simulation purposes.
Hands-on expertise in microarchitecture design and RTL development.
Intermediate knowledge of design tools such as lint tools, UPF low-power coding and debugging, and design testbench writing.
Intermediate to Advanced English proficiency (both verbal and written).
Must have unrestricted - permanent right to work in Costa Rica.

Preferred Qualifications:

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Strong understanding of system architecture and SoC microarchitecture fundamentals.
Demonstrated experience in debugging microarchitecture logic and simulation issues.
Problem-solving skills to address complex hardware design challenges.
Ability to communicate technical concepts effectively to cross-functional teams.
Familiarity with power gating and low-power design techniques.
Experience in writing technical documentation and ensuring design integrity.
A passion for disciplined execution and delivering high-quality results.

Join us in shaping the future of technology. Apply today to become an integral part of Intel's innovative team and drive the next generation of semiconductor advancements.

Job Type:

Experienced Hire

Shift:

Shift 1 (Costa Rica)

Primary Location:

Costa Rica, San Jose

Additional Locations:

Business group:

Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

IPロジック設計エンジニア（経験者）

Job Details:

Job Description:

The primary responsibilities for this role will include, but are not limited to:

Qualifications:

Preferred Qualifications:

Job Type:

Shift:

Primary Location:

Additional Locations:

Business group:

Posting Statement:

Position of Trust

Work Model for this Role

Job Details:

Job Description:

The primary responsibilities for this role will include, but are not limited to:

Qualifications:

Preferred Qualifications:

Job Type:

Shift:

Primary Location:

Additional Locations:

Business group:

Posting Statement:

Position of Trust

Work Model for this Role