Intelでは、Analog Layout Design Engineerを募集しています。アナログ回路レイアウトの設計および検証を担当し、Cadence VirtuosoやCalibre DRCの活用能力が必須です。関連分野の学士で3年以上、または修士で2年以上の実務経験が求められます。ハイブリッド勤務が可能で、マレーシアのペナンまたはクリムでの勤務となります。複雑な回路設計と最適化を通じて技術革新を推進する人材を求めています。
The Role and Impact As an Analog Layout Design Engineer, you will play a critical role in shaping the future of cutting-edge technology at Intel. Leveraging your expertise, you will design and optimize complex analog signal circuit layouts that are fundamental to the performance of our advanced products. You will collaborate with world-class circuit design, process technology, and package design teams to transform innovative ideas into reality. Your contributions will directly impact Intel's ability to deliver industry-leading solutions at scale, driving technological innovation and customer success. Join us to design what's next and make a meaningful difference in the world. Key Responsibilities - Design complex layouts of analog signal circuits based on design specifications. - Execute full design verification, including process design rule checks, electrical reliability checks, and validation of voltage drop (IR), electron migration, and ESD. - Develop and analyze floorplans, power grids, ESD structures, and signal routing with a focus on meeting performance, area, and reliability requirements. - Perform microfloor planning and detailed signal planning, ensuring critical signals meet electrical constraints such as shielding and signal matching. - Improve area, power efficiency, and performance through innovative layout methodologies. - Troubleshoot design and tool/flow/methodology issues in analog layout. - Collaborate with cross-functional teams to negotiate layout tradeoffs and meet project goals. - Drive and implement new approaches to improve layout productivity, quality, and reliability.
Minimum Qualifications - Bachelor's degree in Electrical Engineering, Electronics, or a related field with 3 or more years of industry experience, or a Master's degree with 2 or more years of industry experience, or a PhD with relevant skills and knowledge. - Proficiency in analog layout design fundamentals, including analog/mixed-signal circuit concepts and CMOS technologies. - Hands-on experience with EDA tools such as Cadence Virtuoso Layout Suite, Calibre DRC, and extraction/debug tools. - Expertise in floor planning, hierarchical layout planning, and routing for analog/mixed-signal blocks. - Familiarity with reliability verification, including high-voltage rules and electronic interconnect reliability. - Strong technical documentation skills to communicate complex ideas effectively. Preferred Qualifications - Demonstrated problem-solving and troubleshooting abilities in analog layout design. - Experience working on high-performance, high-reliability analog and mixed-signal designs. - Effective collaboration and communication skills in cross-functional, fast-paced environments. - A track record of contributing to innovative layout methodologies that improve efficiency and quality. Bring your passion for innovation, commitment to excellence, and technical expertise to Intel. Apply now and become part of a team that is redefining technology and pushing the boundaries of possibility.
Experienced Hire
Shift 1 (Malaysia)
Malaysia, Penang
Malaysia, Kulim
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
N/A
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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