アナログ回路設計エンジニア
ハードウェアエンジニア正社員ミドル · 5年以上ベンガルール出社
高速IO設計チームの一員として、次世代メモリインターフェースPHY向けのアナログ回路の設計および検証を担当します。電気工学の学士号が必須であり、修士号保持者は5年以上の実務経験、博士号保持者は経験不問で応募可能です。CMOS設計および高速IO回路の設計経験が必須要件です。勤務形態はオフィス出社が必須であり、設計仕様の策定からレイアウトレビュー、シリコン後のデバッグまで一貫して携わります。
高速IO設計チームの一員として、次世代メモリインターフェースPHY向けのアナログ回路の設計および検証を担当します。電気工学の学士号が必須であり、修士号保持者は5年以上の実務経験、博士号保持者は経験不問で応募可能です。CMOS設計および高速IO回路の設計経験が必須要件です。勤務形態はオフィス出社が必須であり、設計仕様の策定からレイアウトレビュー、シリコン後のデバッグまで一貫して携わります。
The Role and Impact: At Intel, Analog Circuit Design Engineers are at the forefront of innovation, shaping the future of analog and mixed-signal IPs. This critical role involves designing, developing, and optimizing high-speed analog circuits in advanced process nodes, contributing directly to Intel's industry-leading products and technologies. As part of our high-speed IO design team, you will play a pivotal role in creating next-generation memory interface PHYs, driving power, performance, and functionality improvements in cutting-edge circuits. Your expertise will directly impact Intel's ability to deliver high-quality solutions to meet the ever-evolving demands of technology. Key Responsibilities: - Design, develop, and build analog circuits for advanced process nodes, enabling high-performance and robust functionality. - Perform circuit design, validation, extraction of chip parameters, and simulation of analog behavior models. - Optimize circuits for power efficiency, performance, area, timing, and yield goals. - Create test plans to verify designs against block microarchitecture specifications, evaluating test results for design validation. - Collaborate with cross-functional teams to define design specifications, collect feedback, and resolve design issues. - Conduct layout reviews and ensure optimal placement and routing in collaboration with architecture and layout teams. - Contribute to post-silicon debug and validation efforts to support high-volume manufacturing. - Continuously refine design methodologies and processes to improve turnaround time and design quality.
Minimum Qualifications - Bachelor's degree in Electrical Engineering or a closely related field. - 5+ years with a Master's degree, or no experience required with a PhD. - Proficiency in CMOS design and RC circuit fundamentals. - Experience designing high-speed IO circuits, including SerDes, LPDDR, DDR, and HBM (e.g., transmitter, receiver, clocking, PLL, DLL). - Skilled in using tools such as Spectre, PrimeSim, HSPICE, Virtuoso, ADE, and Custom Compiler or other equivalent schematic and layout editors. - Knowledge of DRC, LVS, and post-layout extraction tools. - Capability to perform measurements and correlate them to simulation results. - Proficiency in modeling and simulating high-speed interface interconnects and channels. Preferred Qualifications - Exposure to high-speed digital circuit design and analysis, including timing and flow closure. - Familiarity with digitally assisted analog circuits and techniques. - Knowledge of VerilogA for analog behavioral modeling and proficiency in scripting languages such as TCL, Perl, C, or Python. - Understanding of industry-standard conventions and risk-reduction techniques in analog circuit design. - Strong analytical and problem-solving skills. We are excited to welcome talented individuals who are passionate about technology, eager to tackle challenges, and driven to make an impactful contribution. Apply today and play a key role in shaping Intel's future innovations.
Experienced Hire
Shift 1 (India)
India, Bangalore
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
N/A
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.