You will manage the end-to-end delivery of SerDes PHY IP projects from definition through tapeout and customer deployment. A Bachelor's degree with 8+ years of relevant experience or a Master's/PhD with 6+ years is required. You must possess deep technical knowledge of IC design and ASIC development flows, along with a proven track record of leading complex engineering projects.
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Category Engineering Hire Type Employee Job ID 18155 Date posted 08/02/2026
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent years managing ASIC and IC design projects where the stakes are real, timelines are tight, and the difference between a successful tapeout and a missed window is your ability to see around corners. You know that the hardest part of delivering complex IP is not just the technical work, it is keeping cross-functional teams aligned when R&D, Marketing, Sales, and customers all have different definitions of "done." You do not manage by status reports alone. You get into the details when a SerDes PHY design hits a roadblock, understand the technical tradeoffs well enough to ask the right questions, and work with your engineers to find a path forward that does not compromise quality or schedule. You have learned that risk management is not about spreadsheets, it is about knowing which risks to escalate, which to mitigate quietly, and which conversations to have before they become problems.
You are the kind of leader who can translate a customer's vague requirement into a concrete project scope, push back when timelines do not match reality, and still maintain trust on all sides. You care about process, but only when it makes the team faster and more effective, not for its own sake.
At Synopsys, you will lead SerDes PHY IP projects that power the next generation of high-speed connectivity in everything from data centers to automotive systems. The work is technical, the teams are global, and what you deliver will ship in products that matter.
What You'll Be Doing
Manage end-to-end delivery of high-speed SerDes PHY IP projects from definition through tapeout and customer deployment
Lead cross-functional project teams including design engineers, verification engineers, and layout specialists to execute against aggressive schedules
Partner with R&D and Marketing to define project roadmaps, prioritize features, and align technical deliverables with market requirements
Identify resource gaps, manage project risks, and resolve cross-team dependencies before they block progress
Drive process improvements across the engineering organization, implementing best practices that reduce cycle time and improve quality
Collaborate with Sales, Marketing, and Customer Support teams on pre-sales technical engagement and post-sales issue resolution
Deliver regular status updates to executive leadership and customers, translating technical progress into business outcomes
The Impact You Will Have
Accelerate time-to-market for advanced SerDes IP that enables high-speed connectivity in AI, automotive, and data center applications
Enable customers to meet increasingly complex design requirements with proven, high-quality IP that integrates cleanly into their SoCs
Strengthen Synopsys' reputation as a trusted partner for mission-critical semiconductor IP through consistent on-time, on-spec delivery
Improve engineering efficiency across the organization by identifying bottlenecks and implementing scalable processes that work across multiple projects
Foster tighter collaboration between R&D, Marketing, Sales, and Customer Support, ensuring alignment from early concept through customer deployment
Contribute directly to Synopsys' leadership position in high-speed interface IP, supporting customers building the next generation of smart, connected devices
Mentor project leads and engineers on your team, building organizational capability in technical program management and cross-functional leadership
What You'll Need
Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 8+ years of relevant experience, or Master's/PhD with 6+ years
Deep technical knowledge of IC design, ASIC development flows, and semiconductor IP integration, particularly in mixed-signal or SerDes domains
Proven track record leading complex engineering projects in a high-tech environment, ideally in semiconductor IP or ASIC development
Strong risk management and change management skills, with experience navigating technical uncertainty and scope changes without derailing schedules
Excellent stakeholder management and communication skills, you can explain technical tradeoffs to executives and translate customer requirements into actionable engineering plans
Experience with SerDes PHY IP, high-speed interface standards like PCIe, USB, or Ethernet is a strong plus
Familiarity with project management methodologies and tools, whether Agile, Waterfall, or hybrid approaches tailored to hardware development
Who You Are
You can walk into a project review, quickly assess whether the team is on track or at risk, and ask the two questions that get to the real issue
When a customer escalation lands on your desk, you do not panic or deflect, you pull the right people together, get to root cause, and own the path to resolution
You are comfortable pushing back on unrealistic timelines or under-scoped requirements, but you do it in a way that builds trust rather than defensiveness
You see process improvement as a means to an end, not a goal in itself, and you know the difference between a process that helps and one that just adds overhead
You are detail-oriented enough to catch a missed dependency in a project plan, but strategic enough to keep the team focused on what actually moves the needle
You adapt quickly when priorities shift, resources change, or a technical assumption turns out to be wrong, and you help your team do the same without losing momentum
The Team You'll Be Part Of
Join our Mixed-Signal Semiconductor IP team, a collaborative group driving innovation in high-speed SerDes solutions for next-generation devices.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
