Job Details:
Job Description:
An STA (Static Timing Analysis) Design Intern is responsible for evaluating the timing margins of semiconductor logic designs (ASIC/SoC) to ensure the chip will function at target speeds without errors. Key tasks include running timing constraints, analyzing slack, and fixing setup/hold violations.
Key Responsibilities:
Perform Static Timing Analysis (STA): relating tasks such as kicking off runs, perform timing analysis and timing fixes.
Constraint management: Assist senior engineers in creating, updating and debugging timing exceptions.
Scripting: Write scripts to enhance/speed up the process of the current available flows.
Qualifications:
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Third-year or Final-year student currently pursuing a Bachelor's degree in Electrical Engineering, Computer Engineering, or VLSI Systems or a closely related field (Physics, Maths).
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Be able to work onsite for 4 days per week.
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Be able to commit to at least a 6-month internship program.
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Strong verbal and written communication skills in English.
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Knowledge Base: Strong foundational grasp of digital logic, flip-flops, clock domains, and CMOS circuit design.
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Tools: Familiarity with Linux environments and basic exposure to EDA tools.
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Programming: Proficient in scripting languages (Tcl, Python, or Perl) and hardware description languages (Verilog or SystemVerilog).
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Soft Skills: Strong analytical and problem-solving skills, paired with a collaborative team spirit and a passion for continuous learning.
Benefit Package of Interns at Intel Vietnam
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Attractive internship allowance
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Training programs, opportunities to be involved in multinational projects.
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Exciting extracurricular and sports programs for employees
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Well-invested facilities, putting safety first.
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Shuttle bus system at many places in Ho Chi Minh City, Binh Duong, Dong Nai.
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High-quality cafeteria, lunch allowance.
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Safe, stable and dynamic working environment.
Job Type:
Student / Intern
Shift:
Shift 1 (Vietnam)
Primary Location:
Vietnam, Ho_Chi_Minh_City
Additional Locations:
Business group:
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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