You will work on ASIC digital design and physical implementation flows to optimize next-generation controller IPs. A minimum of 8 years of experience is required, with strong expertise in timing analysis, synthesis, and defining signoff criteria. This is an onsite role in Bengaluru with no remote options available. You will be expected to work both independently and collaboratively within a team to drive technological innovation in semiconductor solutions.
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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
Job Description
Date posted 07/29/2026
Category Engineering Hire Type Employee Job ID 18278 Remote Eligible No Date Posted 07/29/2026
Sr Staff - Physical Implementation Flow (experience - 8+ Years)
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a highly skilled and experienced ASIC Digital Design Engineer passionate about working on the latest processes for physical implementation flows and cutting-edge technology nodes. You thrive in dynamic environments and excel in collaborating with functional teams to optimize and develop Next Gen PCI/CXL/IDE Controller IPs. You have a strong focus on Timing Closure and are adept at defining signoff criteria. Your background includes extensive experience with ASIC design flow, hierarchical physical design strategies, and a deep understanding of sub-micron technology issues. You possess a strong knowledge of timing analysis, constraints management, and various verification strategies, including Primepower-based power analysis. Your scripting skills are excellent, and you are innovative, self-motivated, and able to work both independently and as part of a team. Your communication skills, both verbal and written, are outstanding, and you have a desire to understand RTL/Timing signoff criteria.
What You’ll Be Doing:
Working on new processes for physical implementation flows and cutting-edge technology nodes.
Collaborating with functional teams to optimize and develop Next Gen PCI/CXL/IDE Controller IPs.
Defining signoff criteria with a strong focus on Timing Closure.
Maturing the physical implementation guide used for customers and internal hardening teams.
Participating in next-generation physical design methodology and flow development.
Performing physical design implementation, including synthesis, floor planning, PG Grid design, PnR, CTS, STA, and power/signal integrity signoff.
Evaluating PPA targets (Area/Speed/Power) and collaborating with the design team to improve design and constraints.
The Impact You Will Have:
Driving the development of next-generation physical design methodologies and flows.
Ensuring the optimization and successful implementation of cutting-edge technology nodes.
Contributing to the development of high-performance silicon chips and software content.
Enhancing the efficiency and performance of Synopsys’ IPs through rigorous timing closure and signoff criteria.
Improving customer satisfaction by maturing physical implementation guides.
Supporting the achievement of Synopsys' operational goals through innovative design solutions.
What You’ll Need:
Extensive experience with ASIC design flow and hierarchical physical design strategies.
Strong background in timing analysis, constraints management, and frontend synthesis.
Experience with physical-aware synthesis, formality, and various verification strategies.
Knowledge of Primepower-based power analysis and clock gating for power reduction.
Fair knowledge of FC design planning methodologies, floor planning, and PG Grid creation using Synopsys Tools.
Strong physical implementation flow debugging skills and scripting abilities.
Who You Are:
Innovative, self-motivated, and able to work independently or as a team player. Excellent verbal and written communication skills. Strong analytical and problem-solving abilities. Passionate about continuous learning and staying updated with the latest technological advancements in ASIC digital design.
The Team You’ll Be A Part Of:
You will join a highly skilled and collaborative team focused on developing and optimizing physical design flows for cutting-edge technology nodes. The team is dedicated to innovation, continuous improvement, and delivering high-performance solutions that meet the evolving needs of our customers.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
When you apply to join us, your resume, skills, and experience are first reviewed for consideration.
Phone Screen
Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have.
Interview
Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role.
Offer
Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept!
Onboarding
There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation.
Welcome!
Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!
