SoC Logic Design Engineer

$105,650-$149,150/yrHardware EngineerFull-timeJunior · 0–1 yearsUnited StatesHybrid

You will develop RTL designs and integrate IP blocks for next-generation server SoCs. Candidates must hold a Bachelor's degree with 0-1 years of hands-on experience or a Master's degree with no prior professional experience. Proficiency in System Verilog and experience with Synopsys tools are required. The role follows a hybrid work model, and you will use scripting languages like Python or C++ to improve design workflows.

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