Senior USB IP Design Verification Engineer

Hardware EngineerFull-timeSenior · 6–8 yearsGeorge TownHybrid
System VerilogUVMOVMRTL design verificationVCSPythonPerlShell

Intel is hiring a Senior Design Verification Engineer to ensure the quality of USB IP designs. You must have 6-8 years of experience in RTL verification using System Verilog and UVM/OVM. You will lead test plan development, debug issues, and collaborate with architects. Proficiency i

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