Mixed Signal Design Verification Engineer

Hardware EngineerFull-timeMid-level · 2+ yearsBengaluruHybrid
System VerilogUVMVerilogPythonPerlTclEDA tools

Intel is hiring a Mixed Signal Design Verification Engineer. You will perform IP verification and develop simulation models using System Verilog and UVM. A minimum of 2-3 years of experience in Mixed Signal verification is required. Proficiency with EDA tools is essential. This r

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