Development of AI Accelerator LSI for Accelerating LLM Processing (Functional Verification Model, Performance Verification Model, and Logic Verification Model Construction - Leader Class)

You will lead the development of functional, performance, and logical verification models for AI accelerator LSIs designed to speed up LLM processing as a playing leader. You must have experience in LSI front-end development and proficiency in Verilog, SystemVerilog, or SystemC. Knowledge of logic circuit design and experience with embedded CPUs, NoC, or DRAM memory controllers are required.