Digital Logic Design Engineer (Experienced)

You will perform digital logic design and architecture development, including protocol layers and PHY digital logic for high-speed interfaces like USB-SSP, PCIe, and MIPI. Proficiency in Verilog RTL and System Verilog design and verification is required, along with 3 to 15 years of relevant experience. The technical assessment and interviews are conducted offline, and a reference check may be required.