Design Verification Intern

Hardware EngineerInternJunior · Any experienceVietnam, Ho Chi Minh CityOn-site
SystemVerilogVerilogDigital Logic DesignEnglish

Intel is hiring a Design Verification Intern. This position is open to undergraduate students in their 3rd or 4th year, and foundational knowledge of SystemVerilog and digital logic design is required. Candidates must be able to work on-site four days a week and commit to an internship of at least six months. Proficiency in UVM and Python is preferred, and the role offers opportunities to participate in global projects.

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